An electric power converter, in which power device elements of upper and lower arms that configure an electric-power conversion unit provided at an output stage generate an AC voltage by performing a switching operation based on a voltage command to output the AC voltage to an AC load, provides a period to control the power device elements of the upper and lower arms into off-operation states at the same time for the purpose of preventing a short circuit due to simultaneous conduction of the power device elements of the upper and lower arms. This period is called a dead time; with this dead time, an error is known to occur between a voltage command that the electric-power conversion unit receives and a voltage that the electric-power conversion unit actually outputs to the load based on the voltage command. The error voltage caused by this dead time becomes a voltage with a polarity reversed with respect to the polarity of an output phase current of the electric-power conversion unit.
In order to correct the voltage error caused by this dead time, a method for detecting the output phase current of the electric-power conversion unit by a current-detecting unit provided in the electric power converter and applying a voltage with the same polarity as the detected output phase current to give a corrected voltage command to the electric-power conversion unit is known (for example, Non-patent Document 1). As a method for detecting a current, not only a method for directly detecting the output phase current of the electric-power conversion unit but also a method for detecting the output phase current from a DC link current of the electric-power conversion unit are known (for example, Non-patent Document 2).
However, near a current zero cross point where the polarity of the output phase current switches, because the absolute value of the output phase current is small, accurately detecting the polarity of the output phase current is very difficult. In addition, near the current zero cross point, because the output phase current causes chattering, the correction method of adding a voltage with the same polarity as the polarity of the output phase current to the voltage command may cause a polarity error of a correction voltage added to the voltage command, or a phenomenon in which the polarity of the correction voltage continuously switches between a positive and a negative voltages, alternately.
For this reason, various proposals have been conventionally made to prevent the problem of dead-time correction near the current zero cross point where the absolute value of the output phase current is low (for example, Patent Documents 1 to 4).
Specifically, Patent Documents 1 discloses an example of configuring an output voltage error correction apparatus of an inverter apparatus, which corrects an output voltage error caused by a short-circuit prevention period of the output voltage of the inverter apparatus, to include a current detection unit that detects the output current of the inverter apparatus, a current polarity judgment unit that judges the polarity of the output current detected by this current detection unit, and the voltage error correction unit that, for a threshold value set for the output current, if the output current of the inverter apparatus is outside the threshold value, corrects the output voltage by the polarity of the judged output voltage, and if the output current of the inverter apparatus is within the threshold value, corrects the output voltage by the polarity of the voltage command.
Moreover, Patent Documents 2 discloses an example of configuring an inverter that directly converts DC to AC by bridge-connecting to the arms, which are semiconductor elements, and when controlling the inverter by giving a pulse-width modulated voltage signal, which is obtained by comparing the magnitude relation between a voltage command signal and a carrier signal, to the bridge-connected upper or lower side arm element, configuring a control circuit of a pulse-width modulation control inverter provided with an on delay time for preventing a simultaneous on of the upper and lower side arm elements to include a current polarity judgment unit for outputting a signal to judge the polarity of this output current when the output current of the inverter exceeds a predetermined positive or negative value, a voltage polarity judgment unit for outputting a signal to judge the polarity of the voltage command signal, a first compensation amount calculation unit for calculating the amount to compensate an error voltage occurred in the output voltage of the inverter due to the on delay time, a compensation amount distribution unit for outputting the first compensation amount calculation value in a state where the polarity of the first compensation amount calculation value corresponds to the current polarity and the voltage polarity, and an addition unit for adding the output value of the compensation amount distribution unit to the voltage command signal to make the added value a new voltage command signal.
Moreover, Patent Documents 3 discloses an example of configuring an AC motor drive apparatus that includes a current detection unit for detecting a current flowing into an AC motor, a deviation current calculation unit for calculating a deviation current from a command current and the detected current, a current control unit for calculating a command voltage from the deviation current, a dead time compensation unit, which includes the current polarity judgment unit for determining the current polarity, for outputting a dead time compensation voltage, a voltage addition calculation unit for adding the dead time compensation voltage to the command voltage calculated from the current control unit to calculate a final command voltage, and a PWM electric power conversion apparatus for converting from an AC voltage to a DC voltage using the information on the final command voltage obtained from the voltage addition calculation unit; wherein the dead time compensation unit includes a command current polarity judgment unit for judging a command current polarity from a command current, a detection current polarity judgment unit for judging a detection current polarity from a detected current, and a final current polarity judgment unit for judging a final current polarity from the information on the command current polarity and the detection current polarity.
Furthermore, Patent Documents 4 discloses an example of configuring a PWM control inverter apparatus in which a voltage correction unit for correcting an inverter output voltage by the error voltage calculated using an upper-and-lower-arm short-circuit prevention period, a PWM carrier frequency, and a DC voltage corrects the inverter output voltage in accordance with the polarity of the inverter output current when the absolute value of the inverter output current is larger than a predetermined value and corrects the inverter output voltage in accordance with the polarity of the inverter output voltage when the absolute value of the inverter output current is smaller than the predetermined value; wherein a PWM carrier setting unit that sets the PWM carrier frequency is configured so that the PWM carrier frequency keeps the value of the frequency thereof when the error voltage is smaller than the inverter output voltage, and the PWM carrier frequency is changed so as to keep the ratio between the error voltage and the inverter output voltage constant when the error voltage is larger than the inverter output voltage.    Patent Document 1: Japanese Patent No. 2756049 (Page 16, FIG. 11)    Patent Document 2: Japanese Patent No. 3245989 (Page 12, FIG. 7)    Patent Document 3: Japanese Patent Application Laid-open No. 2004-112879 (Page 6, FIG. 2)    Patent Document 4: Japanese Patent No. 3287186 (Page 8, FIG. 3)    Non-patent Document 1: Sugimoto, Koyama, and Tamai: Practice of Theory and Design on AC Servo System: Sougoudenshi Shuppansha (9th line in Page 55 to 5th line in Page 57)    Non-patent Document 2: “Three-Phase Current-Waveform-Detection on PWM Inverters from DC Link Current-Steps” IPEC-Yokohama'95 p.p. 271-275)